Data transmission with INTERBUS

With bus systems, a difference is made between the different access methods or the transmission physics used. Besides the commonly used bus systems in electronics and computer technology, the two systems in particular described below play an important role in automation technology.

Summation frame procedure - Master/Slave structure

INTERBUS is the only bus system that works according to the summation frame procedure with only one protocol frame for the messages of all bus stations. In this master-slave access method, the bus master is the coupling to the higher-level control or bus system. The method is highly efficient for transmitting data and makes it possible to transmit and receive data simultaneously (full duplex mode). Due to this data transmission method, INTERBUS guarantees constant and calculable sampling intervals for setpoints and actual values. The data of all connected peripherals, combined in one block, is integrated in the summation frame. This consists of an initial identifier, the loop back word and the data security and end information. The necessary additional information is only transmitted once per cycle. Basically, one can imagine this method as a register formed by the bus stations connected to form a ring system. In INTERBUS, this ring system consists of several binary storage cells through which digital information is pushed from cell to cell in the frequency of an external cycle. Each bus station is assigned a specific amount of buffers with a predefined number of cells for different tasks, e.g. for data collection and data output to the process.

Transmission physics - Summation frame procedure

Additional registers check the data transmission for errors. An Interbus station contains three registers connected in parallel: The I/O data is passed on with the data register. The Interbus station type is stored in the identification register. It allows the bus master to identify the bus topology and carry out addressing. Data is backed up with the CRC16 register (Cyclic Redundancy Check), which checks that the data transmission is correct.

Line-shaped structure for message-related transmission

Cycle time and calculation

The cycle time, i.e. the time that is needed to exchange I/O data once with all connected modules, depends on the amount of user data of an INTERBUS system. The cycle time increases in proportion to the amount of I/O points only, since it depends on the information to be transmitted. For every bit, a certain amount of time is necessary. Because the summation frame is always the same length, the cycle time is always the same too. INTERBUS guarantees the deterministic method of operation with the summation frame procedure, and this is vital for fast controls. The process data to be output to the peripherals is stored according to the physical order of the connected output stations in the output buffer of the master. During data output, process information flows back as input data into the input buffer of the master. After the entire summation frame has been output and simultaneously input in this way, all output data is correctly positioned in the individual stations. The data is made available to the host, as defined by the user. Connecting all stations results in a ring, the length and structure of which correspond exactly to the design of the user data field in the summation frame telegram. In the summation frame procedure, the share of the user data is higher than 60%. Bus access conflicts do not occur due to the master-slave structure. Potential error sources can therefore be eliminated from the start.

PCP transmission

To be able to transmit not only parameter data, but also time-critical process data, the data format is extended by a specific time slot. In several consecutive cycles, part of the data is inserted into the time slots intended for the addressed devices. The PCP software (Peripherals Communication Protocol) takes over this task: It inserts a part of the telegram into each INTERBUS cycle and rejoins them again at the destination. The parameter channels are activated as necessary and do not influence the transport of the I/O data. The longer transmission time for the parameter data due to segmentation into several bus cycles is sufficient for the low time requirements for the transmission of parameter information. Transmission reliability The bus master guarantees transmission reliability with the loop back word, for example. This clear bit combination passes through the bus system in a precalculated number of cycles. If, after this time, it is again in the receiving buffer of the master, the ring is closed. The data is backed up according to the CRC16 procedure. A piece of test information is added to the data and evaluated by the receiver.

Deterministics

An important feature of INTERBUS is the deterministic characteristic, i.e. the time guarantee with which the cyclic data is transferred between the geographically distributed stations. Furthermore, the summation frame procedure guarantees that the process image of all stations is consistent because all input data originates from the same sampling time and all output data is adopted by the stations simultaneously.

Optimum EMC behavior

As opposed to other bus protocols, it is possible with INTERBUS to keep the physical transmission speed at a low level. This is immediately reflected in the component and cable costs, as well as in the more cost-effective EMC behavior. On the other hand, it also indicates the enormous potential INTERBUS has to offer when the transmission speed is increased. Compared to older message-oriented systems, it is not necessary to compensate protocol overhead by increasing the transmission speed to achieve an adequate data throughput.